Jump to content

help with multiplexing/demultiplexing


oolfur

Recommended Posts

dear list,
i have just finished making a touch sensitive keyboard for my electromagnetic instrument, where each of the touch nodes output 5v logic as you touch them.
i need these signals to be sent to another module through a cable, to turn things on/off - so rather than using a bulky 30 wire cable to get the control signals where i need them, i thought the 4067 multiplex breakout from sparkfun might come handy :: https://www.sparkfun.com/products/9056
i understand this mux chip can also serve as a demultiplexer, however i dont quite understand how to pack the button states into a single datastream on the keyboard side, and how to unpack them on the other.
would i be able to use another 4067 chip in reverse? or do i need an arduino to scan through the inputs at high speeds?
here is a diagram of what i need to do:
wsg0din.png
any thoughts would be greatly appreciated!!
thank you so much
all the best,
-úlfur
Link to comment
Share on other sites

It's been a few years since I've done this sort of thing but I reckon what you really want is a parallel-load shift register at the transmitting end, and a serial-in parallel-out shift register at the receiving end. Data is loaded in parallel at the transmitter in one consecutive 30-bit word and then shifted out one bit at a time in synchronism with a clocking signal. At the receiving end the incoming serial data is shifted into the receiving register in synchronism with the same clock signal and when 30 bits have been received the data is made available as one contiguous byte at the outputs. To read a new word you send a signal to both transmitter and receiver to reset their inputs and start clocking again. Do it fast enough and your ears won't hear the gaps in between each 30-bit transmission.

Have a look at the 74165 as your transmitter and the 74595 as the receiver. They're only 8 bits wide, but you can daisy chain multiple chips together to expand the number of bits you can shift in one hit. You'd need four at each end to cover your 30 on/off signals (4x 8 bits = 32 with two "dead" bits at the end).

Your interconnecting cable would require 3 conductors - the shifter clock, a reset signal to synchronise the two ends and the data conductor. Add another 2 conductors if you're sending power from the receiver box to the transmitter circuitry (external power perhaps?).

Link to comment
Share on other sites

There's a clear representation of the system that Curtisa describes here:

http://wilsonminesco.com/6502primer/potpourri.html

Replace that 6522 VIA with a simple oscillator (Google "simple ttl oscillator" - there's endless choice) driving a decoded counter to drive the LOAD and CLOCK lines. Use the raw oscillator signal as your CLOCK line for the counter and for the CLOCK inputs of all the shift register chips.

The counter circuit works like this:

We ignore all counter outputs except for bit 6 (Weight=32) and bit 1 (Weight=1).

We derive two signals from the counter:

Use the Counter's bit 6 as the Load/Shift signal.

Logically AND counter bits 1 and 6 to generate a counter reset pulse.

THE SEQUENCE IS AS FOLLOWS...

During states 0-31...

Permit one-bit-per-state data transfer across during states 0-31 (That includes the 2 unused bits)

On state 32...

Handily, the counter outputs xx100000 - use the Counter's bit 6 as the Load/Shift signal.

This will need inverted to drive the '165s, but can be applied directly to the '595s.

This will simultaneously LOAD the Input State (Key-side '165s) AND transfer the JUST-FRESHLY-SHIFTED bits to the output pins of the '595s.

On state 33...

RESET the counter.

The counter outputs xx100001, so logical AND counter bits 1 and 6 to generate a counter reset pulse on reaching state 33. This signal may need inverted, depending on the polarity of your counter's RESET line.

With the counter reset to xx000000, the cycle starts again from state 0.

The speed of the clock oscillator is up to you.

To avoid logic-defying mystery faults...

Use one 100n supply-decoupling capacitor for each chip, mounted physically close to each chip's positive supply pin.

Edited by elmo7sharp9
  • Like 1
Link to comment
Share on other sites

Join the conversation

You can post now and register later. If you have an account, sign in now to post with your account.

Guest
Reply to this topic...

×   Pasted as rich text.   Paste as plain text instead

  Only 75 emoji are allowed.

×   Your link has been automatically embedded.   Display as a link instead

×   Your previous content has been restored.   Clear editor

×   You cannot paste images directly. Upload or insert images from URL.

×
×
  • Create New...